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147
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ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
16 years 20 days ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
127
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CVPR
2008
IEEE
16 years 5 months ago
Shading models for illumination and reflectance invariant shape detectors
Many objects have smooth surfaces of a fairly uniform color, thereby exhibiting shading patterns that reveal information about its shape, an important clue to the nature of the ob...
Peter Nillius, Josephine Sullivan, Antonis A. Argy...
162
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EFDBS
2003
15 years 5 months ago
Four-Level-Architecture for Closure in Interoperability
A definition of types in an information system is given from ld abstractions through data constructs, schema and definitions to physical data values. Category theory suggests tha...
B. Nick Rossiter, Michael A. Heather
101
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ICCD
2000
IEEE
69views Hardware» more  ICCD 2000»
15 years 8 months ago
Hierarchical Simulation of a Multiprocessor Architecture
When proposing new architectural enhancements, it is also important to account for the hardware complexity. To achieve this goal, we propose to model the new design in a hardware ...
Marius Pirvu, Laxmi N. Bhuyan, Rabi N. Mahapatra
129
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DEXA
2005
Springer
77views Database» more  DEXA 2005»
15 years 9 months ago
An Optimal Skew-insensitive Join and Multi-join Algorithm for Distributed Architectures
Abstract. The development of scalable parallel database systems requires the design of efficient algorithms for the join operation which is the most frequent and expensive operatio...
Mostafa Bamha