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ICWS
2007
IEEE
15 years 6 months ago
Rich Services: The Integration Piece of the SOA Puzzle
One of the key challenges to successful systems-ofsystems integration using Web services technologies is how to address crosscutting architectural concerns such as policy manageme...
Matthew Arrott, Barry Demchak, Vina Ermagan, Claud...
IMS
2000
123views Hardware» more  IMS 2000»
15 years 8 months ago
Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...
David Judd, Katherine A. Yelick, Christoforos E. K...
ICCD
2008
IEEE
119views Hardware» more  ICCD 2008»
16 years 1 months ago
Hierarchical simulation-based verification of Anton, a special-purpose parallel machine
—One of the major design verification challenges in the development of Anton, a massively parallel special-purpose machine for molecular dynamics, was to provide evidence that co...
John P. Grossman, John K. Salmon, Richard C. Ho, D...
ASPLOS
2000
ACM
15 years 9 months ago
FLASH vs. (Simulated) FLASH: Closing the Simulation Loop
Simulation is the primary method for evaluating computer systems during all phases of the design process. One significant problem with simulation is that it rarely models the syst...
Jeff Gibson, Robert Kunz, David Ofelt, Mark Heinri...
ICS
2009
Tsinghua U.
15 years 11 months ago
Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
Jiayuan Meng, Kevin Skadron