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ESANN
2006
15 years 6 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout
TASLP
2008
115views more  TASLP 2008»
15 years 4 months ago
Recognition of Dialogue Acts in Multiparty Meetings Using a Switching DBN
Abstract--This paper is concerned with the automatic recognition of dialogue acts (DAs) in multiparty conversational speech. We present a joint generative model for DA recognition ...
Alfred Dielmann, Steve Renals
DATE
2000
IEEE
137views Hardware» more  DATE 2000»
15 years 9 months ago
Retargeting of Compiled Simulators for Digital Signal Processors Using a Machine Description Language
This paper presents a methodology to retarget the technique of compiled simulation for Digital Signal Processors DSPs using the modeling language LISA. In the past, the principl...
Stefan Pees, Andreas Hoffmann, Heinrich Meyr
ICCCN
2007
IEEE
15 years 11 months ago
Lagniappe: Multi-* Programming Made Simple
—The emergence of multi-processor, multi-threaded architectures (referred to as multi- architectures) facilitates the design of high-throughput request processing systems (e.g., ...
Taylor L. Riché, R. Greg Lavender, Harrick ...
FPGA
2003
ACM
137views FPGA» more  FPGA 2003»
15 years 10 months ago
Customized regular channel design in FPGAs
FPGAs are one of the essential components in platform-based embedded systems. Such systems are customized and applied only to a limited set of applications. Also some applications...
Elaheh Bozorgzadeh, Majid Sarrafzadeh