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ICCAD
2001
IEEE
91views Hardware» more  ICCAD 2001»
16 years 1 months ago
A System for Synthesizing Optimized FPGA Hardware from MATLAB
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
EUROGRAPHICS
2010
Eurographics
16 years 1 months ago
Fast Ray Sorting and Breadth-First Packet Traversal for GPU Ray Tracing
We present a novel approach to ray tracing execution on commodity graphics hardware using CUDA. We decompose a standard ray tracing algorithm into several data-parallel stages tha...
Kirill Garanzha and Charles Loop
SBACPAD
2007
IEEE
143views Hardware» more  SBACPAD 2007»
15 years 11 months ago
A Code Compression Method to Cope with Security Hardware Overheads
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
Eduardo Wanderley Netto, Romain Vaslin, Guy Gognia...
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COLING
2000
15 years 6 months ago
An ontology of systematic relations for a shared grammar of Slavic
Sharing portions of grammars across languages greatly reduces the costs of multilingual grammar engineering. Related languages share a much wider range of linguistic information t...
Tania Avgustinova, Hans Uszkoreit
NIPS
1993
15 years 6 months ago
Temporal Difference Learning of Position Evaluation in the Game of Go
The game of Go has a high branching factor that defeats the tree search approach used in computer chess, and long-range spatiotemporal interactions that make position evaluation e...
Nicol N. Schraudolph, Peter Dayan, Terrence J. Sej...