15 search results - page 3 / 3 » Modeling instruction placement on a spatial architecture |
ASPDAC
1998
ACM
15 years 4 months ago
1998
ACM
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...
103
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MICRO
2007
IEEE
15 years 6 months ago
2007
IEEE
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
CORR
2010
Springer
14 years 12 months ago
2010
Springer
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
CODES
2005
IEEE
15 years 5 months ago
2005
IEEE
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
116
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MICRO
2010
IEEE
14 years 10 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...