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» Modeling shared variables in VHDL
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EUROPAR
2010
Springer
15 years 1 months ago
A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures
Abstract. This paper is motivated by the desire to provide an efficient and scalable software cache implementation of OpenMP on multicore and manycore architectures in general, and...
Chen Chen, Joseph B. Manzano, Ge Gan, Guang R. Gao...
MSWIM
2009
ACM
15 years 5 months ago
Modeling and performance evaluation of transmission control protocol over cognitive radio ad hoc networks
Cognitive Radio (CR) technology constitutes a new paradigm to provide additional spectrum utilization opportunities in wireless ad hoc networks. Recent research in this field has ...
Marco Di Felice, Kaushik Roy Chowdhury, Luciano Bo...
78
Voted
ACMICEC
2007
ACM
115views ECommerce» more  ACMICEC 2007»
15 years 4 months ago
An economic model of portal competition under privacy concerns
Due to inherent privacy concerns, online personalization services such as those offered through toolbars and desktop widgets are characterized by "no-free-disposal" (NFD...
Ramnath K. Chellappa, Raymond G. Sin
102
Voted
VMCAI
2010
Springer
15 years 9 months ago
Shape Analysis with Reference Set Relations
Tracking subset relations between the contents containers on the heap is fundamental to modeling the semantics of many common programing idioms such as applying a function to a sub...
Mark Marron, Rupak Majumdar, Darko Stefanovic, Dee...
IWOMP
2011
Springer
14 years 3 months ago
A Runtime Implementation of OpenMP Tasks
Many task-based programming models have been developed and refined in recent years to support application development for shared memory platforms. Asynchronous tasks are a powerfu...
James LaGrone, Ayodunni Aribuki, Cody Addison, Bar...