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» Modeling synchronous systems in BIP
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HASE
2008
IEEE
14 years 10 months ago
Aiding Modular Design and Verification of Safety-Critical Time-Triggered Systems by Use of Executable Formal Specifications
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
Kohei Sakurai, Péter Bokor, Neeraj Suri
FMCAD
2007
Springer
15 years 4 months ago
Modeling Time-Triggered Protocols and Verifying Their Real-Time Schedules
Time-triggered systems are distributed systems in which the nodes are independently-clocked but maintain synchrony with one another. Time-triggered protocols depend on the synchro...
Lee Pike
DAC
1998
ACM
15 years 10 months ago
Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement
Successive, formal refinement is a new approach for specification of embedded systems using a general-purpose programming language. Systems are formally modeled as Abstractable Sy...
James Shin Young, Josh MacDonald, Michael Shilman,...
ERSA
2006
186views Hardware» more  ERSA 2006»
14 years 11 months ago
The Case for High Level Programming Models for Reconfigurable Computers
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
David L. Andrews, Ron Sass, Erik Anderson, Jason A...
SIGADA
2007
Springer
15 years 4 months ago
AADL modeling and analysis of hierarchical schedulers
A system based on a hierarchical scheduler is a system in which the processor is shared between several collaborative schedulers. Such schedulers exist since 1960 and they are bec...
Frank Singhoff, Alain Plantec