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» Modeling the adoption of new network architectures
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DATE
2006
IEEE
100views Hardware» more  DATE 2006»
15 years 5 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
KDD
2012
ACM
229views Data Mining» more  KDD 2012»
13 years 2 months ago
Finding trendsetters in information networks
Influential people have an important role in the process of information diffusion. However, there are several ways to be influential, for example, to be the most popular or the...
Diego Sáez-Trumper, Giovanni Comarela, Virg...
ASAP
2006
IEEE
145views Hardware» more  ASAP 2006»
15 years 5 months ago
2D-VLIW: An Architecture Based on the Geometry of Computation
This work proposes a new architecture and execution model called 2D-VLIW. This architecture adopts an execution model based on large pieces of computation running over a matrix of...
Ricardo Santos, Rodolfo Azevedo, Guido Araujo
SDL
2003
147views Hardware» more  SDL 2003»
15 years 1 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
KDD
2005
ACM
124views Data Mining» more  KDD 2005»
16 years 3 days ago
A multinomial clustering model for fast simulation of computer architecture designs
Computer architects utilize simulation tools to evaluate the merits of a new design feature. The time needed to adequately evaluate the tradeoffs associated with adding any new fe...
Kaushal Sanghai, Ting Su, Jennifer G. Dy, David R....