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» Modeling transactional memory workload performance
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132
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IPPS
2005
IEEE
15 years 9 months ago
Reconfigurable Object Consistency Model
Consistency is an important issue in Distributed Shared Memory (DSM) systems. These systems share a set of objects or virtual memory pages. The data sharing enables the applicatio...
Christiane V. Pousa, Luís Fabrício W...
122
Voted
IPPS
2005
IEEE
15 years 9 months ago
Scheduling Algorithms for Effective Thread Pairing on Hybrid Multiprocessors
With the latest high-end computing nodes combining shared-memory multiprocessing with hardware multithreading, new scheduling policies are necessary for workloads consisting of mu...
Robert L. McGregor, Christos D. Antonopoulos, Dimi...
179
Voted
SIGOPS
2010
179views more  SIGOPS 2010»
14 years 10 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
144
Voted
ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
15 years 3 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
114
Voted
DSD
2004
IEEE
97views Hardware» more  DSD 2004»
15 years 7 months ago
Scene Management Models and Overlap Tests for Tile-Based Rendering
Tile-based rendering (also called chunk rendering or bucket rendering) is a promising technique for low-power, 3D graphics platforms. This technique decomposes a scene into smalle...
Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassil...