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» Modelling Digital Circuits Problems with Set Constraints
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JCO
2011
115views more  JCO 2011»
14 years 4 months ago
Approximation scheme for restricted discrete gate sizing targeting delay minimization
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Chen Liao, Shiyan Hu
NIPS
2003
14 years 11 months ago
Learning a Distance Metric from Relative Comparisons
This paper presents a method for learning a distance metric from relative comparison such as “A is closer to B than A is to C”. Taking a Support Vector Machine (SVM) approach,...
Matthew Schultz, Thorsten Joachims
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
15 years 6 months ago
Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
Zhuo Feng, Peng Li
ATAL
2011
Springer
13 years 10 months ago
Learning action models for multi-agent planning
In multi-agent planning environments, action models for each agent must be given as input. However, creating such action models by hand is difficult and time-consuming, because i...
Hankz Hankui Zhuo, Hector Muñoz-Avila, Qian...
PETRA
2009
ACM
15 years 4 months ago
Automatic sensor placement in a 3D volume
Given a 3D environment, a set of constraints, and a set of sensor models, this paper addresses the problem of finding the set of sensors and their corresponding placement that cov...
Eric Becker, Gutemberg Guerra-Filho, Fillia Makedo...