This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihi...
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
Brian Slechta, David Crowe, Brian Fahs, Michael Fe...
— Due to the increased usage of NAT boxes and firewalls, it has become harder for applications to establish direct connections seamlessly among two end-hosts. A recently adopted...
Hung Xuan Nguyen, Daniel R. Figueiredo, Matthias G...
Recently HP Labs engaged in a joint project with DreamWorks Animation to develop a Utility Rendering Service that was used to render part of the computer-animated feature film Shr...
Yunhong Zhou, Terence Kelly, Janet L. Wiener, Eric...
In this paper we address the problem of secure multicast of data streams over a multihop wireless ad hoc network. We propose a dynamic multicast group management protocol that aim...
Tansel Kaya, Guolong Lin, Guevara Noubir, A. Yilma...