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ICPPW
2000
IEEE
15 years 6 months ago
Reducing Web Latency with Hierarchical Cache-Based Prefetching
Proxy caches have become a central mechanism for reducing the latency of web document retrieval. While caching alone reduces latency for previously requested documents, web docume...
Dan Foygel, Dennis Strelow
IPPS
2000
IEEE
15 years 6 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
118
Voted
IPPS
2000
IEEE
15 years 6 months ago
Ordering Unstructured Meshes for Sparse Matrix Computations on Leading Parallel Systems
Abstract. Computer simulations of realistic applications usually require solving a set of non-linear partial di erential equations PDEs over a nite region. The process of obtaini...
Leonid Oliker, Xiaoye S. Li, Gerd Heber, Rupak Bis...
99
Voted
HPCA
1996
IEEE
15 years 6 months ago
Fault-Tolerance with Multimodule Routers
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
Suresh Chalasani, Rajendra V. Boppana
IPPS
1996
IEEE
15 years 6 months ago
A Hierarchical Parallel Processing System for the Multipass-Rendering Method
The multipass-rendering method integrating radiosity with ray-tracing gives one of the best solutions for synthesizing photo-realistic images. However, the method is also computat...
Hiroaki Kobayashi, Hitoshi Yamauchi, Yuichiro Toh,...
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