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» Modelling Immunological Memory
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160
Voted
DATE
2003
IEEE
154views Hardware» more  DATE 2003»
15 years 9 months ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli
137
Voted
DATE
2002
IEEE
114views Hardware» more  DATE 2002»
15 years 8 months ago
A Video Compression Case Study on a Reconfigurable VLIW Architecture
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
Davide Rizzo, Osvaldo Colavin
122
Voted
HICSS
1997
IEEE
98views Biometrics» more  HICSS 1997»
15 years 7 months ago
Recovery and Page Coherency for a Scalable Multicomputer Object Store
This paper presents scalable algorithms for recovery and page coherency in multicomputer object stores. Recovery and coherency are central to object store engineering and distribu...
Stephen M. Blackburn, Robin B. Stanton, Stephan J....
251
Voted
JCP
2008
155views more  JCP 2008»
15 years 3 months ago
Algorithm to Optimize Code Size and Energy Consumption in Real Time Embedded System
Processor is an important computing element in portable battery operated real time embedded system and it consumes most of the battery energy. Energy consumption, processor memory ...
Santosh D. Chede, Kishore D. Kulat
128
Voted
CHI
2002
ACM
16 years 4 months ago
Movement model, hits distribution and learning in virtual keyboarding
In a ten-session experiment, six participants practiced typing with an expanding rehearsal method on an optimized virtual keyboard. Based on a large amount of in-situ performance ...
Shumin Zhai, Alison E. Sue, Johnny Accot