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» Modelling Immunological Memory
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142
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CACM
2010
179views more  CACM 2010»
15 years 3 months ago
x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors
Exploiting the multiprocessors that have recently become ubiquitous requires high-performance and reliable concurrent systems code, for concurrent data structures, operating syste...
Peter Sewell, Susmit Sarkar, Scott Owens, Francesc...
IOLTS
2005
IEEE
163views Hardware» more  IOLTS 2005»
15 years 9 months ago
Modeling Soft-Error Susceptibility for IP Blocks
As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These “soft errors” can be a nuisance or catastro...
Robert C. Aitken, Betina Hold
96
Voted
ICCAD
2004
IEEE
97views Hardware» more  ICCAD 2004»
16 years 20 days ago
Statistical design and optimization of SRAM cell for yield enhancement
In this paper, we have analyzed ond modeled the fiilure probabilities ofSRAM cells due to process parameter variations. A method to predict the yield of a memoiy chip based on the...
Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand, Kaush...
130
Voted
RTCSA
2006
IEEE
15 years 9 months ago
Towards an Analysis of Garbage Collection Techniques for Embedded Real-Time Java Systems
From a real-time perspective, the Garbage Collector (GC) introduces unpredictable pauses that are not tolerated by real-time tasks. Real-time collectors eliminate this problem but...
M. Teresa Higuera-Toledano
DSD
2005
IEEE
98views Hardware» more  DSD 2005»
15 years 9 months ago
On LUT Cascade Realizations of FIR Filters
This paper first defines the n-input q-output WS function, as a mathematical model of the combinational part of the distributed arithmetic of a finite impulse response (FIR) ...
Tsutomu Sasao, Yukihiro Iguchi, Takahiro Suzuki