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» Modelling Immunological Memory
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106
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ICPP
1987
IEEE
15 years 7 months ago
Performance of VLSI Engines for Lattice Computations
Abstract. We address the problem of designing and building efficient custom Vl.Sl-besed processors to do computations on large multi-dimensional lattices. The design tradeoffs for ...
Steven D. Kugelmass, Kenneth Steiglitz, Richard K....
131
Voted
GLVLSI
2007
IEEE
153views VLSI» more  GLVLSI 2007»
15 years 5 months ago
Address generation for nanowire decoders
Nanoscale crossbars built from nanowires can form high density memories and programmable logic devices. To integrate such nanoscale devices with other circuits, nanowire decoders ...
Jia Wang, Ming-Yang Kao, Hai Zhou
IJCAI
2007
15 years 5 months ago
A Hybridized Planner for Stochastic Domains
Markov Decision Processes are a powerful framework for planning under uncertainty, but current algorithms have difficulties scaling to large problems. We present a novel probabil...
Mausam, Piergiorgio Bertoli, Daniel S. Weld
ERSA
2004
192views Hardware» more  ERSA 2004»
15 years 5 months ago
VTSim: A Virtex-II Device Simulator
This paper introduces VTsim, a device simulator for Xilinx Virtex-II FPGAs. VTsim is currently a globally synchronous event-driven device simulator modeled at the CLB level. Throu...
Jesse Hunter, Peter Athanas, Cameron Patterson
108
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JVM
2001
97views Education» more  JVM 2001»
15 years 5 months ago
Deterministic Execution of Java's Primitive Bytecode Operations
For the application of Java in realtime and safety critical domains, an analysis of the worst-case execution times of primitive Java operations is necessary. All primitive operati...
Fridtjof Siebert, Andy Walter