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DAC
2004
ACM
16 years 4 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...
135
Voted
MICCAI
2004
Springer
16 years 4 months ago
Solving Incrementally the Fitting and Detection Problems in fMRI Time Series
We tackle the problem of real-time statistical analysis of functional magnetic resonance imaging (fMRI) data. In a recent paper, we proposed an incremental algorithm based on the e...
Alexis Roche, Philippe Pinel, Stanislas Dehaene, J...
WWW
2007
ACM
16 years 4 months ago
A unified platform for data driven web applications with automatic client-server partitioning
Data-driven web applications are usually structured in three tiers with different programming models at each tier. This division forces developers to manually partition applicatio...
Fan Yang 0002, Nitin Gupta 0003, Nicholas Gerner, ...
VLSID
2002
IEEE
127views VLSI» more  VLSID 2002»
16 years 3 months ago
Switching Activity Estimation of Large Circuits using Multiple Bayesian Networks
Switching activity estimation is a crucial step in estimating dynamic power consumption in CMOS circuits. In [1], we proposed a new switching probability model based on Bayesian N...
Sanjukta Bhanja, N. Ranganathan
136
Voted
VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
16 years 3 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann