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DATE
2008
IEEE
170views Hardware» more  DATE 2008»
15 years 10 months ago
ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis
In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model...
Duo Li, Sheldon X.-D. Tan, Bruce McGaughy
122
Voted
ICPP
2008
IEEE
15 years 10 months ago
TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation
The slow speed of conventional execution-driven architecture simulators is a serious impediment to obtaining desirable research productivity. This paper proposes and evaluates a f...
Sangyeun Cho, Socrates Demetriades, Shayne Evans, ...
135
Voted
RTCSA
2008
IEEE
15 years 10 months ago
CREAM: A Generic Build-Time Component Framework for Distributed Embedded Systems
A component framework plays an important role in CBSD as it determines how software components are developed, packaged, assembled and deployed. A desirable component framework for...
Chetan Raj, Jiyong Park, Jungkeun Park, Seongsoo H...
SECON
2008
IEEE
15 years 10 months ago
Content Distribution in VANETs Using Network Coding: The Effect of Disk I/O and Processing O/H
Abstract—Besides safe navigation (e.g., warning of approaching vehicles), car to car communications will enable a host of new applications, ranging from office-on-the-wheel supp...
Seung-Hoon Lee, Uichin Lee, Kang-Won Lee, Mario Ge...
110
Voted
KBSE
2007
IEEE
15 years 9 months ago
Sequential circuits for program analysis
A number of researchers have proposed the use of Boolean satisfiability solvers for verifying C programs. They encode correctness checks as Boolean formulas using finitization: ...
Fadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid