Non-volatile Flash memories are becoming more and more popular in Systems-on-Chip (SoC). Embedded Flash (eFlash) memories are based on the well-known floatinggate transistor conce...
This paper investigates a mechanism for reliable generation of sparse code in a sparsely connected, hierarchical, learning memory. Activity reduction is accomplished with local com...
A global barrier synchronizes all processors in a parallel system. This paper investigates algorithms that allow disjoint subsets of processors to synchronize independently and in...
Anja Feldmann, Thomas R. Gross, David R. O'Hallaro...
We have written a new records library for modelling fixedsize arrays and linear memories. Our implementation provides fixnum-optimized O(log2 n) reads and writes from ad
A neural network model of associative memory is presented which unifies the two historically more relevant enhancements to the basic Little-Hopfield discrete model: the graded resp...
Enrique Carlos Segura Meccia, Roberto P. J. Perazz...