327 search results - page 4 / 66 » Modelling and Evaluation of a Network on Chip Architecture U... |
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
DATE
2007
IEEE
14 years 18 days ago
2007
IEEE
— Recent efforts to address microprocessor power dissipation through aggressive supply voltage scaling and power management require that designers be increasingly cognizant of po...
ISCA
2008
IEEE
14 years 20 days ago
2008
IEEE
As the number of cores per die increases, be they processors, memory blocks, or custom accelerators, the on-chip interconnect the cores use to communicate gains importance. We beg...
DSD
2003
IEEE
13 years 11 months ago
2003
IEEE
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
AINA
2009
IEEE
14 years 1 months ago
2009
IEEE
This paper presents a novel analytical model to compute communication latency of broadcast as the most fundamental collective communication operation. The novelty of the model lie...