Sciweavers

6229 search results - page 8 / 1246
» Models of Computation for Networks on Chip
Sort
View
NOCS
2008
IEEE
16 years 10 days ago
Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture
Ivan Miro Panades, Fabien Clermidy, Pascal Vivet, ...
125
Voted
NOCS
2008
IEEE
16 years 10 days ago
Impact of Process and Temperature Variations on Network-on-Chip Design Exploration
Bin Li, Li-Shiuan Peh, Priyadarsan Patra
142
Voted
FCCM
2007
IEEE
111views VLSI» more  FCCM 2007»
16 years 8 days ago
A Structural Object Programming Model, Architecture, Chip and Tools for Reconfigurable Computing
A new platform for reconfigurable computing has an object-based programming model, with architecture, silicon and tools designed to faithfully realize this model. The platform is ...
Michael Butts, Anthony Mark Jones, Paul Wasson