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FPL
2005
Springer
98views Hardware» more  FPL 2005»
15 years 3 months ago
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
Peter Jamieson, Jonathan Rose
ISORC
2000
IEEE
15 years 1 months ago
Verification of UML-Based Real-Time System Designs by Means of cTLA
The Unified Modeling Language UML is well-suited for the design of real-time systems. In particular, the design of dynamic system behaviors is supported by interaction diagrams an...
Günter Graw, Peter Herrmann, Heiko Krumm
83
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PATMOS
2005
Springer
15 years 3 months ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
NMR
2004
Springer
15 years 3 months ago
Frame consistency: computing with causal explanations
This paper presents a computational model for reasoning with causal explanations of observations within the framework of Abductive Event Calculus (AEC). The model is based on abdu...
Andrea Bracciali, Antonis C. Kakas
ICSE
2001
IEEE-ACM
15 years 2 months ago
A Framework for Multi-Valued Reasoning over Inconsistent Viewpoints
In requirements elicitation, different stakeholders often hold different views of how a proposed system should behave, resulting in inconsistencies between their descriptions. Con...
Steve M. Easterbrook, Marsha Chechik