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89
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ASPDAC
2006
ACM
230views Hardware» more  ASPDAC 2006»
15 years 6 months ago
Statistical Bellman-Ford algorithm with an application to retiming
— Process variations in digital circuits make sequential circuit timing validation an extremely challenging task. In this paper, a Statistical Bellman-Ford (SBF) algorithm is pro...
Mongkol Ekpanyapong, Thaisiri Watewai, Sung Kyu Li...
DAC
2006
ACM
15 years 6 months ago
Clock buffer and wire sizing using sequential programming
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequent...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...
SLIP
2006
ACM
15 years 6 months ago
Statistical crosstalk aggressor alignment aware interconnect delay calculation
Crosstalk aggressor alignment induces significant interconnect delay variation and needs to be taken into account in a statistical timer. In this paper, we approximate crosstalk ...
Andrew B. Kahng, Bao Liu, Xu Xu
118
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ICCV
2005
IEEE
15 years 6 months ago
Bayesian Body Localization Using Mixture of Nonlinear Shape Models
We present a 2D model-based approach to localizing human body in images viewed from arbitrary and unknown angles. The central component is a statistical shape representation of th...
Jiayong Zhang, Robert T. Collins, Yanxi Liu
ISQED
2005
IEEE
125views Hardware» more  ISQED 2005»
15 years 6 months ago
A New Method for Design of Robust Digital Circuits
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin C...