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FDTC
2006
Springer
117views Cryptology» more  FDTC 2006»
15 years 9 months ago
DPA on Faulty Cryptographic Hardware and Countermeasures
Abstract. Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reli...
Konrad J. Kulikowski, Mark G. Karpovsky, Alexander...
ISVLSI
2005
IEEE
113views VLSI» more  ISVLSI 2005»
15 years 11 months ago
Balancing System Level Pipelines with Stage Voltage Scaling
This paper presents an approach to dynamically balance the pipeline by scaling the stage supply voltages. Simulation results show that by such an approach about 50% improvement in...
Hui Guo, Sri Parameswaran
SAC
2003
ACM
15 years 10 months ago
Real-Time Monitoring of Large Scientific Simulations
We present a distributed framework that enables real-time streaming and visualization of data generated by large remote simulations. We address issues arising from distributed cli...
Valerio Pascucci, Daniel E. Laney, Ray J. Frank, F...
ICRA
2006
IEEE
181views Robotics» more  ICRA 2006»
15 years 11 months ago
Balanced Micro/Macro Contact Model for Forward Dynamics of Rigid Multibody
— This paper proposes a computational method of contact forces working between multibody system and environment in forward dynamics based on both the microbody-deformation model ...
Tomomichi Sugihara, Yoshihiko Nakamura
ASPDAC
1999
ACM
144views Hardware» more  ASPDAC 1999»
15 years 10 months ago
Model Order Reduction of Large Circuits Using Balanced Truncation
A method is introduced for model order reduction of large circuits extracted from layout. The algorithm, which is based on balanced realization, can be used for reducing the order ...
Payam Rabiei, Massoud Pedram