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» Mullet - A Parallel Multiplier Generator
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ISLPED
1996
ACM
105views Hardware» more  ISLPED 1996»
15 years 1 months ago
Energy delay analysis of partial product reduction methods for parallel multiplier implementation
This paper examines the energy delay implications of partial product reduction methods employed in parallel multiplier implementations. Radix 4 Modified Booth Algorithm (MBA) is c...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
ASAP
2008
IEEE
96views Hardware» more  ASAP 2008»
15 years 4 months ago
Integer and floating-point constant multipliers for FPGAs
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
Nicolas Brisebarre, Florent de Dinechin, Jean-Mich...
ASAP
2003
IEEE
155views Hardware» more  ASAP 2003»
15 years 2 months ago
Decimal Multiplication Via Carry-Save Addition
Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. This p...
Mark A. Erle, Michael J. Schulte
96
Voted
CHES
2009
Springer
162views Cryptology» more  CHES 2009»
15 years 10 months ago
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers
Abstract. This paper is devoted to the design of fast parallel accelerators for the cryptographic Tate pairing in characteristic three over supersingular elliptic curves. We propos...
Jean-Luc Beuchat, Jérémie Detrey, Ni...
ICS
1997
Tsinghua U.
15 years 1 months ago
Optimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology
Modern microprocessors can achieve high performance on linear algebra kernels but this currently requires extensive machine-speci c hand tuning. We have developed a methodology wh...
Jeff Bilmes, Krste Asanovic, Chee-Whye Chin, James...