575 search results - page 32 / 115 » Multi-Valued Logic Synthesis |
ISQED
2011
IEEE
14 years 1 months ago
2011
IEEE
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
GLVLSI
2007
IEEE
15 years 4 months ago
2007
IEEE
A special logic synthesis problem is considered for Boolean functions which have large don’t care sets and are irregular. Here, a function is considered as irregular if the inpu...
CADE
2002
Springer
15 years 10 months ago
2002
Springer
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TABLEAUX
2009
Springer
15 years 4 months ago
2009
Springer
This paper presents a method for synthesising sound and complete tableau calculi. Given a specification of the formal semantics of a logic, the method generates a set of tableau i...
ATVA
2008
Springer
14 years 12 months ago
2008
Springer
1 : Logic in Specification and Verification (abstract) Natarajan Shankar (SRI) Session Chair : Sungdeok Cha 12 : 00 13 : 00 Lunch 13 : 00 15 : 00 2 : Boolean Modeling of Cell Biolo...