575 search results - page 37 / 115 » Multi-Valued Logic Synthesis |
ASYNC
1997
IEEE
15 years 2 months ago
1997
IEEE
This paper introduces a novel technique for synthesis of speed-independent circuits from their Signal Transition Graph specifications. The new method uses partial order in the fo...
CSL
2009
Springer
15 years 4 months ago
2009
Springer
Abstract. For a two-variable formula B(X,Y) of Monadic Logic of Order (MLO) the Church Synthesis Problem concerns the existence and construction of a finite-state operator Y=F(X) ...
ENTCS
2007
14 years 9 months ago
2007
We propose to use a formal specification language as a high-level hardware description language. Formal languages allow for compact, unambiguous representations and yield designs...
DAC
2003
ACM
15 years 10 months ago
2003
ACM
Combinational circuits are generally thought of as acyclic structures. It is known that cyclic structures can be combinational, and techniques have been proposed to analyze cyclic...
DAC
1997
ACM
15 years 1 months ago
1997
ACM
We propose a methodology for applying gate-level logic transformations to optimize power in digital circuits. Statistically simulated[14] switching information, gate delays, signa...