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DATE
2009
IEEE
106views Hardware» more  DATE 2009»
15 years 4 months ago
Debugging of Toffoli networks
—Intensive research is performed to find post-CMOS technologies. A very promising direction based on reversible logic are quantum computers. While in the domain of reversible lo...
Robert Wille, Daniel Große, Stefan Frehse, G...
DATE
2000
IEEE
82views Hardware» more  DATE 2000»
15 years 2 months ago
Constructive Library-Aware Synthesis Using Symmetries
In this paper a constructive library-aware multilevel logic synthesis approach using symmetries is described. It integrates the technology-independent and technologydependent stag...
Victor N. Kravets, Karem A. Sakallah
FPL
2006
Springer
132views Hardware» more  FPL 2006»
15 years 1 months ago
Adaptive FPGAs: High-Level Architecture and a Synthesis Method
This paper presents preliminary work exploring adaptive field programmable gate arrays (AFPGAs). An AFPGA is adaptative in the sense that the functionality of subcircuits placed o...
Valavan Manohararajah, Stephen Dean Brown, Zvonko ...
CAV
2010
Springer
172views Hardware» more  CAV 2010»
15 years 1 months ago
Symbolic Bounded Synthesis
Abstract. Synthesis of finite state systems from full linear time temporal logic (LTL) specifications is gaining more and more attention as several recent achievements have signi...
Rüdiger Ehlers
IJCSS
2007
133views more  IJCSS 2007»
14 years 9 months ago
Synthesis of Read-Once Digital Hardware with Reduced Energy Delay Product
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
P. Balasubramanian, S. Theja