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DSD
2007
IEEE
119views Hardware» more  DSD 2007»
15 years 12 months ago
Online Protocol Testing for FPGA Based Fault Tolerant Systems
In this paper, the methodology for automated design of checker for communication protocol testing is presented. Based on the level of checking, different design strategies can be ...
Jiri Tobola, Zdenek Kotásek, Jan Korenek, T...
TVLSI
2010
15 years 7 days ago
Variation-Aware System-Level Power Analysis
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
15 years 11 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
DSRT
2005
IEEE
15 years 11 months ago
Modeling Decentralized Real-Time Control by State Space Partition of Timed Automata
Timed automata provide useful state machine based representations for the validation and verification of realtime control systems. This paper introduces an algorithmic methodolog...
Thanikesavan Sivanthi, Srivas Chennu, Lothar Kreft
ASWEC
2009
IEEE
16 years 11 days ago
Change Propagation Analysis Using Domain Information
We propose a novel methodology for analysing change propagation in software using the domain-level behavioural model of a system. We hypothesize that change propagation analysis i...
Amir Aryani, Ian D. Peake, Margaret Hamilton, Hein...