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95
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TVLSI
2008
111views more  TVLSI 2008»
14 years 9 months ago
GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
78
Voted
POPL
1995
ACM
15 years 1 months ago
Parametric Program Slicing
Program slicing is a technique for isolating computational threads in programs. In this paper, we show how to mechanically extract a family of practical algorithms for computing s...
John Field, G. Ramalingam, Frank Tip
PPDP
2005
Springer
15 years 3 months ago
Trace effects and object orientation
fects are statically generated program abstractions, that can be model checked for verification of assertions in a temporal program logic. In this paper we develop a type and eff...
Christian Skalka
89
Voted
ESOP
2009
Springer
15 years 4 months ago
A Basis for Verifying Multi-threaded Programs
Abstract. Advanced multi-threaded programs apply concurrency concepts in sophisticated ways. For instance, they use fine-grained locking to increase parallelism and change locking...
K. Rustan M. Leino, Peter Müller
RTAS
2010
IEEE
14 years 8 months ago
Physicalnet: A Generic Framework for Managing and Programming Across Pervasive Computing Networks
This paper describes the design and implementation of a pervasive computing framework, named Physicalnet. Essentially, Physicalnet is a generic paradigm for managing and programmi...
Pascal Vicaire, Zhiheng Xie, Enamul Hoque, John A....