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HPCC
2007
Springer
15 years 3 months ago
File and Memory Security Analysis for Grid Systems
The grid security architecture today does not prevent certain unauthorized access to the files associated with a job executing on a remote machine. Programs and data are transferre...
Unnati Thakore, Lorie M. Liebrock
DATE
1999
IEEE
113views Hardware» more  DATE 1999»
15 years 2 months ago
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...
William Fornaciari, Donatella Sciuto, Cristina Sil...
SODA
2003
ACM
102views Algorithms» more  SODA 2003»
14 years 11 months ago
Online paging with arbitrary associativity
We tackle the problem of online paging on two level memories with arbitrary associativity (including victim caches, skewed caches etc.). We show that some important classes of pag...
Enoch Peserico
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
15 years 6 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
15 years 3 months ago
Scalable Hardware Memory Disambiguation for High ILP Processors
This paper describes several methods for improving the scalability of memory disambiguation hardware for future high ILP processors. As the number of in-flight instructions grows...
Simha Sethumadhavan, Rajagopalan Desikan, Doug Bur...