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» Multi-processor system design with ESPAM
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RTCSA
2007
IEEE
15 years 3 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
15 years 3 months ago
Contrasting a NoC and a traditional interconnect fabric with layout awareness
Increasing miniaturization is posing multiple challenges to electronic designers. In the context of Multi-Processor System-onChips (MPSoCs), we focus on the problem of implementin...
Federico Angiolini, Paolo Meloni, Salvatore Carta,...
DSD
2008
IEEE
124views Hardware» more  DSD 2008»
15 years 3 months ago
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
LCTRTS
2010
Springer
15 years 4 months ago
Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
Ines Viskic, Lochi Lo Chi Yu Lo, Daniel Gajski
CP
2007
Springer
15 years 3 months ago
Scheduling Conditional Task Graphs
The increasing levels of system integration in Multi-Processor System-on-Chips (MPSoCs) emphasize the need for new design flows for efficient mapping of multi-task applications o...
Michele Lombardi, Michela Milano