284 search results - page 54 / 57 » Multi-scheduler Concurrency Control for Parallel Database Sy... |
TC
2008
14 years 9 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
EDBT
2009
ACM
15 years 4 months ago
2009
ACM
Database storage managers have long been able to efficiently handle multiple concurrent requests. Until recently, however, a computer contained only a few single-core CPUs, and th...
75
Voted
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
122
click to vote
ISPASS
2009
IEEE
15 years 4 months ago
2009
IEEE
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
119
click to vote
CLUSTER
2009
IEEE
15 years 4 months ago
2009
IEEE
—Server consolidation based on virtualization technology will simplify system administration, reduce the cost of power and physical infrastructure, and improve utilization in tod...