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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
15 years 10 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
ICSE
1999
IEEE-ACM
15 years 10 months ago
Residual Test Coverage Monitoring
Structural coverage criteria are often used as an indicator of the thoroughness of testing, but complete satisfaction of a criterion is seldom achieved. When a software product is...
Christina Pavlopoulou, Michal Young
DBSEC
2008
137views Database» more  DBSEC 2008»
15 years 7 months ago
Towards Automation of Testing High-Level Security Properties
Abstract. Many security problems only become apparent after software is deployed, and in many cases a failure has occurred prior to the awareness of the problem. Although many woul...
Aiman Hanna, Hai Zhou Ling, Jason Furlong, Mourad ...
WORDS
2003
IEEE
15 years 11 months ago
Scalable Online Feasibility Tests for Admission Control in a Java Real-Time System
In the Komodo project a real-time Java system based on a multithreaded Java microcontroller has been developed. A main scheduling policy realized by hardware in the microcontroller...
Uwe Brinkschulte
153
Voted
DATE
2002
IEEE
136views Hardware» more  DATE 2002»
15 years 10 months ago
Beyond UML to an End-of-Line Functional Test Engine
In this paper, we analyze the use of UML as a starting point to go from design issues to end of production testing of complex embedded systems. The first point is the analysis of ...
Andrea Baldini, Alfredo Benso, Paolo Prinetto, Ser...