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91
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DAC
1997
ACM
15 years 4 months ago
Multilevel Circuit Partitioning
Recent work [2] [5] [11] [12] [14] has illustrated the promise of multilevel approaches for partitioning large circuits. Multilevel partitioning recursively clusters the instance ...
Charles J. Alpert, Jen-Hsin Huang, Andrew B. Kahng
97
Voted
DAC
1997
ACM
15 years 4 months ago
Multilevel Hypergraph Partitioning: Application in VLSI Domain
In this paper, we present a new hypergraph partitioning algorithm that is based on the multilevel paradigm. In the multilevel paradigm, a sequence of successively coarser hypergra...
George Karypis, Rajat Aggarwal, Vipin Kumar, Shash...
99
Voted
ICCD
2002
IEEE
101views Hardware» more  ICCD 2002»
15 years 9 months ago
Improving the Efficiency of Circuit-to-BDD Conversion by Gate and Input Ordering
Boolean functions are fundamental to synthesis and verification of digital logic, and compact representations of Boolean functions have great practical significance. Popular repre...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
86
Voted
ICCAD
2005
IEEE
117views Hardware» more  ICCAD 2005»
15 years 9 months ago
IMF: interconnect-driven multilevel floorplanning for large-scale building-module designs
Abstract— We present in this paper a new interconnect-driven multilevel floorplanning, called IMF, to handle large-scale building-module designs. Unlike the traditional multilev...
Tung-Chieh Chen, Yao-Wen Chang, Shyh-Chang Lin
94
Voted
TCAD
2008
89views more  TCAD 2008»
15 years 6 days ago
A New Multilevel Framework for Large-Scale Interconnect-Driven Floorplanning
We present in this paper a new interconnect-driven multilevel floorplanner, called interconnect-driven multilevelfloorplanning framework (IMF), to handle large-scale buildingmodule...
Tung-Chieh Chen, Yao-Wen Chang, Shyh-Chang Lin