—A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
This paper aims at developing an automated device-level placement for analog circuit design which achieves comparable quality to manual designs by experts. It extracts a set of cl...
Automatic circuit placement has received renewed interest recently given the rapid increase of circuit complexity, increase of interconnect delay, and potential sub-optimality of ...
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shin...