395 search results - page 26 / 79 » Multilevel Circuit Partitioning |
ISMVL
2002
IEEE
15 years 4 months ago
2002
IEEE
An impact of introducing multi-level signals to a bandpass delta-sigma modulator (DSM), which is of particular interest for wireless communications applications, has been investig...
114
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ICCAD
2009
IEEE
14 years 9 months ago
2009
IEEE
Clock skew scheduling has been effectively used to reduce the clock period of sequential circuits. However, this technique may become impractical if a different skew must be appli...
132
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VLSID
2002
IEEE
16 years 4 days ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
DAC
2005
ACM
16 years 22 days ago
2005
ACM
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
108
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KDD
2005
ACM
16 years 5 days ago
2005
ACM
Graph clustering (also called graph partitioning) -- clustering the nodes of a graph -- is an important problem in diverse data mining applications. Traditional approaches involve...