395 search results - page 30 / 79 » Multilevel Circuit Partitioning |
122
click to vote
ISPD
2012
ACM
13 years 5 months ago
2012
ACM
We propose a new multilevel framework for large-scale placement called MAPLE that respects utilization constraints, handles movable macros and guides the transition between global...
73
Voted
DATE
2009
IEEE
15 years 1 months ago
2009
IEEE
This paper exploits the unique in-field controllability of the device polarity of ambipolar carbon nanotube field effect transistors (CNTFETs) to design a technology library with ...
85
Voted
PLDI
2003
ACM
15 years 2 months ago
2003
ACM
Clustered architectures are a solution to the bottleneck of centralized register files in superscalar and VLIW processors. The main challenge associated with clustered architectu...
102
click to vote
JGT
2007
14 years 9 months ago
2007
A transition system T of an Eulerian graph G is a family of partitions of the edges incident to each vertex of G into transitions i.e. subsets of size two. A circuit decomposition...
SLIP
2005
ACM
15 years 3 months ago
2005
ACM
We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...