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ISQED
2007
IEEE
123views Hardware» more  ISQED 2007»
15 years 4 months ago
General Block Structure-Preserving Reduced Order Modeling of Linear Dynamic Circuits
In this paper, we propose a generalized block structure-preserving reduced order interconnect macromodeling method (BSPRIM). Our approach extends structure-preserving model order ...
Ning Mi, Boyuan Yan, Sheldon X.-D. Tan, Jeffrey Fa...
ISLPED
1997
ACM
83views Hardware» more  ISLPED 1997»
15 years 1 months ago
A symbolic algorithm for low-power sequential synthesis
We present an algorithm that restructures the state transition graph STG of a sequential circuit so as to reduce power dissipation. The STG is modi ed without changing the behav...
Balakrishna Kumthekar, In-Ho Moon, Fabio Somenzi
ITC
2003
IEEE
124views Hardware» more  ITC 2003»
15 years 3 months ago
On-chip Compression of Output Responses with Unknown Values Using LFSR Reseeding
We propose a procedure for designing an LFSRbased circuit for masking of unknown output values that appear in the output response of a circuit tested using LBIST. The procedure is...
Masao Naruse, Irith Pomeranz, Sudhakar M. Reddy, S...
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 2 months ago
Timing-driven partitioning for two-phase domino and mixed static/domino implementations
Domino logic is a high-performance circuit configuration that is usually embedded in static logic environment and tightly coupled with the clocking scheme. In this paper, the timi...
Min Zhao, Sachin S. Sapatnekar
EAAI
2006
189views more  EAAI 2006»
14 years 9 months ago
Evolutionary algorithms for VLSI multi-objective netlist partitioning
The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI ...
Sadiq M. Sait, Aiman H. El-Maleh, Raslan H. Al-Aba...