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» Multilevel Circuit Partitioning
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ISPD
2003
ACM
89views Hardware» more  ISPD 2003»
15 years 2 months ago
Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning
Traditional multilevel partitioning approaches have shown good performance with respect to cutsize, but offer no guarantees with respect to system performance. Timing-driven part...
Andrew B. Kahng, Xu Xu
DAC
1999
ACM
15 years 10 months ago
Hypergraph Partitioning with Fixed Vertices
We empirically assess the implications of fixed terminals for hypergraph partitioning heuristics. Our experimental testbed incorporates a leading-edge multilevel hypergraph partit...
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Marko...
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
15 years 3 months ago
Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources
As FPGA densities increase, partitioning-based FPGA placement approaches are becoming increasingly important as they can be used to provide high-quality and computationally scalab...
Navaratnasothie Selvakkumaran, Abhishek Ranjan, Sa...
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
15 years 6 months ago
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
In this paper we present a family of multi-objective hypergraph partitioning algorithms based on the multilevel paradigm, which are capable of producing solutions in which both th...
Navaratnasothie Selvakkumaran, George Karypis
PPSC
1997
14 years 11 months ago
A Coarse-Grain Parallel Formulation of Multilevel k-way Graph Partitioning Algorithm
In this paper we present a parallel formulation of a multilevel k-way graph partitioning algorithm, that is particularly suited for message-passing libraries that have high latenc...
George Karypis, Vipin Kumar