Sciweavers

395 search results - page 48 / 79
» Multilevel Circuit Partitioning
Sort
View
ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
15 years 3 months ago
Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics
As research begins to explore potential nanotechnologies for future post-CMOS integrated systems, modeling and simulation environments must be developed that can accommodate the c...
Jiayong Le, Lawrence T. Pileggi, Anirudh Devgan
DAC
2003
ACM
15 years 10 months ago
A new enhanced constructive decomposition and mapping algorithm
Structuring and mapping of a Boolean function is an important problem in the design of complex integrated circuits. Libraryaware constructive decomposition offers a solution to th...
Alan Mishchenko, Xinning Wang, Timothy Kam
ICCAD
2003
IEEE
100views Hardware» more  ICCAD 2003»
15 years 6 months ago
A Theory of Non-Deterministic Networks
Both non-determinism and multi-level networks compactly characterize the flexibility allowed in implementing a circuit. A theory for representing and manipulating non-deterministi...
Alan Mishchenko, Robert K. Brayton
ISMVL
2005
IEEE
86views Hardware» more  ISMVL 2005»
15 years 3 months ago
Multiple-Valued Duplex Asynchronous Data Transfer Scheme for Interleaving in LDPC Decoders
A novel duplex asynchronous data-transfer scheme based on multiple-valued encoding is proposed for interleaving in Low-Density Parity-Check (LDPC) decoders, where high-throughput ...
Naoya Onizawa, Akira Mochizuki, Takahiro Hanyu
DATE
1998
IEEE
92views Hardware» more  DATE 1998»
15 years 2 months ago
Restructuring Logic Representations with Easily Detectable Simple Disjunctive Decompositions
Simple disjunctive decomposition is a special case of logic function decompositions, where variables are divided into two disjoint sets and there is only one newly introduced vari...
Hiroshi Sawada, Shigeru Yamashita, Akira Nagoya