395 search results - page 53 / 79 » Multilevel Circuit Partitioning |
DATE
1999
IEEE
15 years 2 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
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FPGA
1998
ACM
15 years 1 months ago
1998
ACM
It has become clear that large embedded con gurable memory arrays will be essential in future FPGAs. Embedded arrays provide high-density high-speed implementations of the storage...
DCC
2008
IEEE
15 years 9 months ago
2008
IEEE
We introduce an EDIF netlist graph algorithm which is lossy with respect to the original byte stream but lossless in terms of the circuit information it contains based on a graph ...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
SPFDs are a mechanism to express flexibility in Boolean networks. Introduced by Yamashita et al. in the context of FPGA synthesis [4], they were extended later to general combina...
DSD
2008
IEEE
15 years 4 months ago
2008
IEEE
This paper proposes a design method and programmable architectures for numerical function generators (NFGs) of two-variable functions. To realize a two-variable function in hardwa...