395 search results - page 64 / 79 » Multilevel Circuit Partitioning |
ICCAD
2006
IEEE
15 years 3 months ago
2006
IEEE
Abstract—Power/ground noise is a major source of VLSI circuit timing variations. This work aims to reduce clock network induced power noise by assigning different signal polariti...
VTS
2005
IEEE
15 years 3 months ago
2005
IEEE
We present three resistive bridging fault models valid for different CMOS technologies. The models are partitioned into a general framework (which is shared by all three models) a...
67
Voted
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
- This paper presents a solution to the problem of designing interconnects for memory devices. More precisely, it solves the automatic routing problem of memory peripheral circuits...
73
Voted
DAC
2004
ACM
15 years 3 months ago
2004
ACM
In order to improve the testabilities and power consumption, a new state assignment technique based on m-block partition is introduced in this paper. The length and number of feed...
BIRTHDAY
2004
Springer
15 years 3 months ago
2004
Springer
Ternary algebra has been used for detection of hazards in logic circuits since 1948. Process spaces have been introduced in 1995 act models of concurrent processes. Surprisingly, p...