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VTS
2003
IEEE
119views Hardware» more  VTS 2003»
15 years 2 months ago
Test Data Compression Using Dictionaries with Fixed-Length Indices
—We present a dictionary-based test data compression approach for reducing test data volume and testing time in SOCs. The proposed method is based on the use of a small number of...
Lei Li, Krishnendu Chakrabarty
ISPD
2003
ACM
103views Hardware» more  ISPD 2003»
15 years 2 months ago
An integrated floorplanning with an efficient buffer planning algorithm
Previous works on buffer planning are mainly based on fixed die placement. It is necessary to reduce the complexity of computing the feasible buffer insertion sites to integrate t...
Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, ...
PADS
2003
ACM
15 years 2 months ago
DVS: An Object-Oriented Framework for Distributed Verilog Simulation
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
Lijun Li, Hai Huang, Carl Tropper
FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
15 years 1 months ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
DAC
2010
ACM
15 years 1 months ago
Cost-aware three-dimensional (3D) many-core multiprocessor design
The emerging three-dimensional integrated circuit (3D IC) is beneficial for various applications from both area and performance perspectives. While the general trend in processor...
Jishen Zhao, Xiangyu Dong, Yuan Xie