209 search results - page 11 / 42 » Multilevel generalization of relaxation algorithms for circu... |
104
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GLVLSI
2003
IEEE
15 years 6 months ago
2003
IEEE
Modeling on-chip inductive effects for interconnects of multigigahertz microprocessors remains challenging. SPICE simulation of these effects is very slow because of the large num...
108
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ISPD
2003
ACM
15 years 6 months ago
2003
ACM
This paper studies the optimality, scalability and stability of stateof-the-art partitioning and placement algorithms. We present algorithms to construct two classes of benchmarks...
122
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ICCAD
2002
IEEE
15 years 10 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
GECCO
2005
Springer
2005
Springer
Providing information from the environment for growing electronic circuits through polymorphic gates
15 years 6 months ago
This paper deals with the evolutionary design of programs (constructors) that are able to create (n+2)-input circuits from n-input circuits. The growing circuits are composed of p...
148
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ISPD
1997
ACM
15 years 5 months ago
1997
ACM
The wire sizing problem under inequality Elmore delay constraints is known to be posynomial, hence convex under an exponential variable-transformation. There are formal methods fo...