This paper proposes a new hierarchical circuit modeling and simulation technique in s-domain for linear analog circuits. The new algorithm can perform circuit complexity reduction...
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Generalizing the approach of a previous work [15] the authors present multilevel preconditioners for three-dimensional (3D) elliptic problems discretized by a family of Rannacher ...
We investigate and model the dynamics of two-dimensional stochastic self-assembly of intelligent micro-systems with minimal requirements in terms of sensing, actuation, and contro...
Abstract— We present in this paper a new interconnect-driven multilevel floorplanning, called IMF, to handle large-scale building-module designs. Unlike the traditional multilev...