126 search results - page 6 / 26 » Multiple FPGA Partitioning with Performance Optimization |
APCSAC
2001
IEEE
15 years 1 months ago
2001
IEEE
Traditional reconfigurable computing platforms are designed to be single user and have been acknowledged to be difficult to design applications for. The design tools are still pri...
ICASSP
2008
IEEE
15 years 4 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
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EUROPAR
2009
Springer
15 years 2 months ago
2009
Springer
Abstract. The functional performance model (FPM) of heterogeneous processors has proven to be more realistic than the traditional models because it integrates many important featur...
EUROPAR
2009
Springer
15 years 2 months ago
2009
Springer
The paper presents a new data partitioning algorithm for parallel computing on heterogeneous processors. Like traditional functional partitioning algorithms, the algorithm assumes ...
FPL
2000
Springer
15 years 1 months ago
2000
Springer
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling techn...