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SAMOS
2010
Springer
15 years 4 months ago
A Polymorphic Register File for matrix operations
—Previous vector architectures divided the available register file space in a fixed number of registers of equal sizes and shapes. We propose a register file organization whic...
Catalin Bogdan Ciobanu, Georgi Kuzmanov, Georgi Ga...
ASPDAC
2004
ACM
109views Hardware» more  ASPDAC 2004»
15 years 12 months ago
Resource-constrained low-power bus encoding with crosstalk delay elimination
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...
Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim
CVPR
2008
IEEE
16 years 8 months ago
Graph commute times for image representation
We introduce a new image representation that encompasses both the general layout of groups of quantized local invariant descriptors as well as their relative frequency. A graph of...
Nikos Paragios, Regis Behmo, Véronique Prin...
178
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QEST
2005
IEEE
16 years 1 days ago
iLTLChecker: A Probabilistic Model Checker for Multiple DTMCs
iLTL is a probabilistic temporal logic that can specify properties of multiple discrete time Markov chains (DTMCs). In this paper, we describe two related tools: MarkovEstimator a...
YoungMin Kwon, Gul A. Agha
ELPUB
2006
ACM
16 years 13 days ago
Identifying Trends in Accessible Content Processing
The European Accessible Information Network (EUAIN) is currently examining issues relating to accessible content processing. With the support of key European publishers, it has be...
David Crombie, Roger Lenoir, Neil McKenzie, Franci...