Abstract—Today’s wirelessly networked embedded systems underlie a vast array of electronic devices, performing computation, communication, and input/output. A major design goal...
—Partial Reconfiguration (PR) of FPGAs presents many opportunities for application design flexibility, enabling tasks to dynamically swap in and out of the FPGA without entire sy...
Abstract—While prior research has extensively evaluated the performance advantage of moving from a 2D to a 3D design style, the impact of process parameter variations on 3D desig...
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
Canetti, Goldreich, Goldwasser, and Micali (STOC 2000) introduced the notion of resettable zeroknowledge proofs, where the protocol must be zero-knowledge even if a cheating veriï...