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CODES
2004
IEEE
15 years 1 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
CDES
2006
89views Hardware» more  CDES 2006»
14 years 11 months ago
Autonomous Instruction Memory Equipped with Dynamic Branch Handling Capability
Memory accesses have always been a speed-limiting factor, and memory bandwidth has always been an intensively contended scarce resource. Nevertheless, with recent pervasive emergen...
Hui-Chin Yang, Chung-Ping Chung
BMCBI
2010
90views more  BMCBI 2010»
14 years 9 months ago
PuTmiR: A database for extracting neighboring transcription factors of human microRNAs
Background: Some of the recent investigations in systems biology have revealed the existence of a complex regulatory network between genes, microRNAs (miRNAs) and transcription fa...
Sanghamitra Bandyopadhyay, Malay Bhattacharyya
86
Voted
VLSID
2007
IEEE
209views VLSI» more  VLSID 2007»
15 years 10 months ago
Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
Saraju P. Mohanty, Elias Kougianos
DBPL
1995
Springer
124views Database» more  DBPL 1995»
15 years 1 months ago
Scaling Database Languages to Higher-Order Distributed Programming
We describe the Tycoon   approach to scale the successful notion of a uniform, type-safe persistent object store to communication-intensive applications and applications where lo...
Bernd Mathiske, Florian Matthes, Joachim W. Schmid...