94 search results - page 5 / 19 » Multiple-banked register file architectures |
106
click to vote
VLSISP
2008
15 years 1 months ago
2008
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
115
click to vote
CODES
2001
IEEE
15 years 5 months ago
2001
IEEE
Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A ke...
113
click to vote
ICCD
2004
IEEE
15 years 10 months ago
2004
IEEE
Modern superscalar microprocessors need sizable register files to support large number of in-flight instructions for exploiting ILP. An alternative to building large register file...
123
click to vote
ICCD
2003
IEEE
15 years 10 months ago
2003
IEEE
A critical problem in wide-issue superscalar processors is the limit on cycle time imposed by the central register file and operand bypass network. In this paper, a distributed re...
104
click to vote
DSN
2005
IEEE
15 years 7 months ago
2005
IEEE
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...